About the project
This project will develop novel techniques to enhance the physical layer performance of 5G non-terrestrial networks. In particular, Multiple Input Multiple Output (MIMO) techniques for exploiting inter-beam interference and for user-specific beamforming can be used for enhancing capacity and coverage.
The practical implementation of the developed techniques can be considered, with consideration of the complexity and applicability to implementation in software, Field-Programmable Gate Arrays (FPGA), Application-Specific Integrated Circuits (ASIC), and Artificial Intelligence (AI) accelerators.
Prof Rob Maunder is the founder and Chief Technology Officer (CTO) of AccelerComm, which spun-out of the University of Southampton in 2016. Since then, AccelerComm has developed a physical layer for a 5G base station that can be deployed on satellites orbiting the Earth and provide 5G coverage for devices on the ground. Lockheed Martin has integrated this physical layer into a satellite, and this will be the world's first 5G base station in space, when the satellite launches in the coming months.
This represents the first step towards the vision of a 5G non-terrestrial network, that offers global coverage for a wide variety of consumer 5G smart phones and devices. This will dramatically reduce the cost of satellite telephony and dramatically increase the percentage of the global population that is connected to the Internet. However, challenges remain in delivering sufficient radio power from the satellite to a 5G device and vice versa, in order to enable high bandwidth connectivity.
Leveraging Prof Rob Maunder's expertise and industry experience, this project will develop novel techniques to enhance the physical layer performance of non-terrestrial networks. In particular, MIMO techniques for exploiting inter-beam interference and for user-specific beamforming can be used for enhancing capacity and coverage. The practical implementation of the developed techniques can be considered, with consideration of the complexity and applicability to implementation in software, FPGA, ASIC and AI accelerators.