In the "<cellname>.spice" file
Replace
.option scale=0.1u m0 out in Vdd Vdd pmos0553 w=22 l=5 + ad=132 pd=62 as=636 ps=174 m1 out in GND GND nmos0553 w=11 l=5 + ad=490 pd=216 as=0 ps=0With
.param extrap=0 .option scale=0.1u m0 out in Vdd Vdd pmos0553 w='22+extrap' l=5 + ad=132 pd=62 as=636 ps=174 m1 out in GND GND nmos0553 w=11 l=5 + ad=490 pd=216 as=0 ps=0
remember to make these changes for all PMOS transitors in the Spice file.
Next append a SWEEP statement to the .TRAN command in the "<cellname>.sp" file. e.g.
.TRAN 10PS 10NS SWEEP extrap -3 +3 1
This should perform simulations with extrap in the range -3 to +3 at intervals of 1.
N.B. If you have been asked to optimze the size on NMOS rather than PMOS transistors you will need an extran sweep variable which modifies the width of NMOS transistors rather than the extrap sweep variable.
Having used HSpice and Awaves to choose the most suitable value you can return to magic, make the changes and re-simulate to confirm your predicted result. Your final simulation should include a sweep with arguments: "-1 +1 1" to show that the chosen value is better than the value below and the value above.