///////////////////////////////////////////////////////////////////////
//
// altimeter module - 2024/2025
//
//    this is simply a shell representing the pad ring
//    which instances alt_core
//
//    this version makes significant use of ifdef macros in order
//    to support different alt_core designs
//    *** no submitted altimeter module should use these macros since
//    each submitted altimeter module will be designed to pair with a
//    specific alt_core module ****
//
///////////////////////////////////////////////////////////////////////

`include "options.sv"

module altimeter(

  output SCL,
  inout tri1 SDA,

  output RS,
  output RnW,
  output E,
  inout [7:0] DB,

  `ifdef include_oled
    output SCLK, SDIN, DnC, nCS,
  `endif

  `ifdef include_alarm
    output Alarm,
  `endif
  input tri1 nMode, nTrip,

  `ifndef no_scan_signals
    output SDO, input Test, SDI,
    `ifdef scan_enable
      ScanEnable,
    `endif
  `endif

  input Clock, nReset

  );

timeunit 1ns;
timeprecision 100ps;

wire [7:0] DB_In, DB_Out;
wire DB_nEnable;
wire SDA_In, SDA_Out;

//
// simulation of bidirectional pads
//

assign SDA = ( ! SDA_Out ) ? '0 : 'z;
assign SDA_In = SDA;

assign DB = ( ! DB_nEnable ) ? DB_Out : 'z;
assign DB_In = DB;



//
// optionally synchronise the asynchronous reset in this wrapper
//

`ifdef synchronise_reset_within_wrapper

logic sync_nReset_1,sync_nReset_2;

always @( posedge Clock, negedge nReset )
  if ( ! nReset )
    begin
      sync_nReset_1 <= '0;
      sync_nReset_2 <= '0;
    end
  else
    begin
      sync_nReset_1 <= '1;
      sync_nReset_2 <= sync_nReset_1;
    end

  assign core_nReset = sync_nReset_2;

`else

  assign core_nReset = nReset;

`endif


//
// optionally synchronise the asynchronous inputs in this wrapper
//

`ifdef synchronise_inputs_within_wrapper

logic sync_nMode_1, sync_nMode_2;
logic sync_nTrip_1, sync_nTrip_2;

always @( posedge Clock, negedge core_nReset )
  if ( ! nReset )
    begin
      sync_nMode_1   <= '1;
      sync_nMode_2   <= '1;

      sync_nTrip_1   <= '1;
      sync_nTrip_2   <= '1;
    end
  else
    begin
      sync_nMode_1   <= nMode;
      sync_nMode_2   <= sync_nMode_1;

      sync_nTrip_1   <= nTrip;
      sync_nTrip_2   <= sync_nTrip_1;
    end

  assign core_nMode   = sync_nMode_2;
  assign core_nTrip   = sync_nTrip_2;

`else

  assign core_nMode   = nMode;
  assign core_nTrip   = nTrip;

`endif



alt_core CORE ( 

    .SCL,
    .SDA_In, .SDA_Out,

    .RS, .RnW, .E,
    .DB_In, .DB_Out, .DB_nEnable,


    `ifdef include_oled
      .SCLK, .SDIN, .DnC, .nCS,
    `endif

    `ifdef include_alarm
      .Alarm,
    `endif

    .nMode(core_nMode), .nTrip(core_nTrip),

    `ifndef no_scan_signals
      .SDO, .Test, .SDI,
      `ifdef scan_enable
        .ScanEnable,
      `endif
    `endif

    .Clock, .nReset(core_nReset)
  );

endmodule