H Command: %s 53* vivadotcl2 place_design2default:defaultZ4-113 › @Attempting to get a license for feature '%s' and/or device '%s' 308*common2" Implementation2default:default2 xc7a100t2default:defaultZ17-347 ‹ 0Got license for feature '%s' and/or device '%s' 310*common2" Implementation2default:default2 xc7a100t2default:defaultZ17-349 g ,Running DRC as a precondition to command %s 22* vivadotcl2 place_design2default:defaultZ4-22 G Running DRC with %s threads 24*drc2 22default:defaultZ23-27 M DRC finished with %s 79* vivadotcl2 0 Errors2default:defaultZ4-198 \ BPlease refer to the DRC report (report_drc) for more information. 80* vivadotclZ4-199 L  Starting %s Task 103* constraints2 Placer2default:defaultZ18-103 t BMultithreading enabled for place_design using a maximum of %s CPUs12* placeflow2 22default:defaultZ30-611 m Phase %s%s 101* constraints2 1 2default:default2) Placer Initialization2default:defaultZ18-101 t Phase %s%s 101* constraints2 1.1 2default:default2. Placer Initialization Core2default:defaultZ18-101 Š I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:002default:default2 00:00:00.0112default:default2 889.7622default:default2 0.0002default:defaultZ17-268 x Phase %s%s 101* constraints2 1.1.1 2default:default20 Mandatory Logic Optimization2default:defaultZ18-101 ^ 1Inserted %s IBUFs to IO ports without IO buffers.100*opt2 02default:defaultZ31-140 ^ 1Inserted %s OBUFs to IO ports without IO buffers.101*opt2 02default:defaultZ31-141 C Pushed %s inverter(s). 98*opt2 02default:defaultZ31-138 Š I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2. Netlist sorting complete. 2default:default2 00:00:002default:default2 00:00:00.0122default:default2 889.7622default:default2 0.0002default:defaultZ17-268 J >Phase 1.1.1 Mandatory Logic Optimization | Checksum: b5e88eb4 *common ‰  %s * constraints2r ^Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.249 . Memory (MB): peak = 889.762 ; gain = 0.0002default:default ƒ Phase %s%s 101* constraints2 1.1.2 2default:default2; 'Build Super Logic Region (SLR) Database2default:defaultZ18-101 U IPhase 1.1.2 Build Super Logic Region (SLR) Database | Checksum: b5e88eb4 *common ‰  %s * constraints2r ^Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.272 . Memory (MB): peak = 889.762 ; gain = 0.0002default:default k Phase %s%s 101* constraints2 1.1.3 2default:default2# Add Constraints2default:defaultZ18-101 = 1Phase 1.1.3 Add Constraints | Checksum: b5e88eb4 *common ‰  %s * constraints2r ^Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.273 . Memory (MB): peak = 889.762 ; gain = 0.0002default:default h Phase %s%s 101* constraints2 1.1.4 2default:default2 Build Macros2default:defaultZ18-101 ; /Phase 1.1.4 Build Macros | Checksum: 13b3761ef *common ‰  %s * constraints2r ^Time (s): cpu = 00:00:01 ; elapsed = 00:00:00.566 . Memory (MB): peak = 889.762 ; gain = 0.0002default:default | Phase %s%s 101* constraints2 1.1.5 2default:default24 Implementation Feasibility check2default:defaultZ18-101 O CPhase 1.1.5 Implementation Feasibility check | Checksum: 13b3761ef *common …  %s * constraints2n ZTime (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 889.762 ; gain = 0.0002default:default k Phase %s%s 101* constraints2 1.1.6 2default:default2# Pre-Place Cells2default:defaultZ18-101 > 2Phase 1.1.6 Pre-Place Cells | Checksum: 13b3761ef *common …  %s * constraints2n ZTime (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 890.586 ; gain = 0.8242default:default Ž Phase %s%s 101* constraints2 1.1.7 2default:default2F 2IO Placement/ Clock Placement/ Build Placer Device2default:defaultZ18-101 a UPhase 1.1.7 IO Placement/ Clock Placement/ Build Placer Device | Checksum: 165ff8ddf *common …  %s * constraints2n ZTime (s): cpu = 00:00:02 ; elapsed = 00:00:02 . Memory (MB): peak = 891.512 ; gain = 1.7502default:default v Phase %s%s 101* constraints2 1.1.8 2default:default2. Build Placer Netlist Model2default:defaultZ18-101 o Phase %s%s 101* constraints2 1.1.8.1 2default:default2% Place Init Design2default:defaultZ18-101 p Phase %s%s 101* constraints2 1.1.8.1.1 2default:default2$ Build Clock Data2default:defaultZ18-101 C 7Phase 1.1.8.1.1 Build Clock Data | Checksum: 1d249d1bf *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:06 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default B 6Phase 1.1.8.1 Place Init Design | Checksum: 17cc29db9 *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default I =Phase 1.1.8 Build Placer Netlist Model | Checksum: 17cc29db9 *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default s Phase %s%s 101* constraints2 1.1.9 2default:default2+ Constrain Clocks/Macros2default:defaultZ18-101 ~ Phase %s%s 101* constraints2 1.1.9.1 2default:default24 Constrain Global/Regional Clocks2default:defaultZ18-101 Q EPhase 1.1.9.1 Constrain Global/Regional Clocks | Checksum: 17cc29db9 *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default F :Phase 1.1.9 Constrain Clocks/Macros | Checksum: 17cc29db9 *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default G ;Phase 1.1 Placer Initialization Core | Checksum: 17cc29db9 *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default @ 4Phase 1 Placer Initialization | Checksum: 17cc29db9 *common †  %s * constraints2o [Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 906.109 ; gain = 16.3482default:default h Phase %s%s 101* constraints2 2 2default:default2$ Global Placement2default:defaultZ18-101 f Phase %s%s 101* constraints2 2.1 2default:default2 Run Budgeter2default:defaultZ18-101 9 -Phase 2.1 Run Budgeter | Checksum: 1a966b08a *common †  %s * constraints2o [Time (s): cpu = 00:00:14 ; elapsed = 00:00:11 . Memory (MB): peak = 914.055 ; gain = 24.2932default:default ; /Phase 2 Global Placement | Checksum: 197d41184 *common †  %s * constraints2o [Time (s): cpu = 00:00:21 ; elapsed = 00:00:16 . Memory (MB): peak = 914.055 ; gain = 24.2932default:default h Phase %s%s 101* constraints2 3 2default:default2$ Detail Placement2default:defaultZ18-101 t Phase %s%s 101* constraints2 3.1 2default:default2. Commit Multi Column Macros2default:defaultZ18-101 G ;Phase 3.1 Commit Multi Column Macros | Checksum: 197d41184 *common †  %s * constraints2o [Time (s): cpu = 00:00:22 ; elapsed = 00:00:16 . Memory (MB): peak = 914.055 ; gain = 24.2932default:default v Phase %s%s 101* constraints2 3.2 2default:default20 Commit Most Macros & LUTRAMs2default:defaultZ18-101 I =Phase 3.2 Commit Most Macros & LUTRAMs | Checksum: 22fd70649 *common †  %s * constraints2o [Time (s): cpu = 00:00:23 ; elapsed = 00:00:18 . Memory (MB): peak = 914.055 ; gain = 24.2932default:default p Phase %s%s 101* constraints2 3.3 2default:default2* Area Swap Optimization2default:defaultZ18-101 C 7Phase 3.3 Area Swap Optimization | Checksum: 2a65da1b3 *common †  %s * constraints2o [Time (s): cpu = 00:00:23 ; elapsed = 00:00:18 . Memory (MB): peak = 914.055 ; gain = 24.2932default:default o Phase %s%s 101* constraints2 3.4 2default:default2) Timing Path Optimizer2default:defaultZ18-101 B 6Phase 3.4 Timing Path Optimizer | Checksum: 277e7ea19 *common †  %s * constraints2o [Time (s): cpu = 00:00:24 ; elapsed = 00:00:18 . Memory (MB): peak = 914.055 ; gain = 24.2932default:default z Phase %s%s 101* constraints2 3.5 2default:default24 Commit Small Macros & Core Logic2default:defaultZ18-101 M APhase 3.5 Commit Small Macros & Core Logic | Checksum: 1f9756042 *common †  %s * constraints2o [Time (s): cpu = 00:00:25 ; elapsed = 00:00:20 . Memory (MB): peak = 920.137 ; gain = 30.3752default:default l Phase %s%s 101* constraints2 3.6 2default:default2& Re-assign LUT pins2default:defaultZ18-101 ? 3Phase 3.6 Re-assign LUT pins | Checksum: 1f9756042 *common †  %s * constraints2o [Time (s): cpu = 00:00:26 ; elapsed = 00:00:20 . Memory (MB): peak = 921.215 ; gain = 31.4532default:default ; /Phase 3 Detail Placement | Checksum: 1f9756042 *common †  %s * constraints2o [Time (s): cpu = 00:00:26 ; elapsed = 00:00:20 . Memory (MB): peak = 921.215 ; gain = 31.4532default:default € Phase %s%s 101* constraints2 4 2default:default2< (Post Placement Optimization and Clean-Up2default:defaultZ18-101 m Phase %s%s 101* constraints2 4.1 2default:default2' PCOPT Shape updates2default:defaultZ18-101 @ 4Phase 4.1 PCOPT Shape updates | Checksum: 16cefc894 *common †  %s * constraints2o [Time (s): cpu = 00:00:26 ; elapsed = 00:00:20 . Memory (MB): peak = 921.215 ; gain = 31.4532default:default u Phase %s%s 101* constraints2 4.2 2default:default2/ Post Placement Optimization2default:defaultZ18-101 ~ Phase %s%s 101* constraints2 4.2.1 2default:default26 "Post Placement Timing Optimization2default:defaultZ18-101 Q EPhase 4.2.1 Post Placement Timing Optimization | Checksum: 1793ca0b7 *common †  %s * constraints2o [Time (s): cpu = 00:00:30 ; elapsed = 00:00:23 . Memory (MB): peak = 935.996 ; gain = 46.2342default:default H 2Phase 4.4.5 Print Final WNS | Checksum: 228209608 *common †  %s * constraints2o [Time (s): cpu = 00:00:35 ; elapsed = 00:00:26 . Memory (MB): peak = 936.816 ; gain = 47.0552default:default = 1Phase 4.4 Placer Reporting | Checksum: 228209608 *common †  %s * constraints2o [Time (s): cpu = 00:00:35 ; elapsed = 00:00:26 . Memory (MB): peak = 936.816 ; gain = 47.0552default:default q Phase %s%s 101* constraints2 4.5 2default:default2+ Final Placement Cleanup2default:defaultZ18-101 D 8Phase 4.5 Final Placement Cleanup | Checksum: 229de44fb *common †  %s * constraints2o [Time (s): cpu = 00:00:36 ; elapsed = 00:00:26 . Memory (MB): peak = 936.816 ; gain = 47.0552default:default S GPhase 4 Post Placement Optimization and Clean-Up | Checksum: 229de44fb *common †  %s * constraints2o [Time (s): cpu = 00:00:36 ; elapsed = 00:00:26 . Memory (MB): peak = 936.816 ; gain = 47.0552default:default 5 )Ending Placer Task | Checksum: 1479cbd74 *common †  %s * constraints2o [Time (s): cpu = 00:00:00 ; elapsed = 00:00:26 . Memory (MB): peak = 936.816 ; gain = 47.0552default:default Q Releasing license: %s 83*common2" Implementation2default:defaultZ17-83 ½ G%s Infos, %s Warnings, %s Critical Warnings and %s Errors encountered. 28* vivadotcl2 322default:default2 02default:default2 02default:default2 02default:defaultZ4-41 U %s completed successfully 29* vivadotcl2 place_design2default:defaultZ4-42 û I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2" place_design: 2default:default2 00:00:362default:default2 00:00:272default:default2 936.8162default:default2 49.2702default:defaultZ17-268 ^ DEBUG : %s144*timing29 %Generate clock report | CPU: 0 secs 2default:defaultZ38-163  sreport_utilization: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.115 . Memory (MB): peak = 936.816 ; gain = 0.000 *common j DEBUG : %s134* designutils2@ ,Generate Control Sets report | CPU: 0 secs 2default:defaultZ20-134 4 Writing XDEF routing. 211* designutilsZ20-211 A #Writing XDEF routing logical nets. 209* designutilsZ20-209 A #Writing XDEF routing special nets. 210* designutilsZ20-210 … I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s  268*common2) Write XDEF Complete: 2default:default2 00:00:012default:default2 00:00:00.7392default:default2 936.8162default:default2 0.0002default:defaultZ17-268  End Record