H
Command: %s
53*	vivadotcl2 
route_design2default:defaultZ4-113
›

@Attempting to get a license for feature '%s' and/or device '%s'
308*common2"
Implementation2default:default2
xc7a100t2default:defaultZ17-347
‹

0Got license for feature '%s' and/or device '%s'
310*common2"
Implementation2default:default2
xc7a100t2default:defaultZ17-349
g
,Running DRC as a precondition to command %s
22*	vivadotcl2 
route_design2default:defaultZ4-22
G
Running DRC with %s threads
24*drc2

22default:defaultZ23-27
M
DRC finished with %s
79*	vivadotcl2
0 Errors2default:defaultZ4-198
\
BPlease refer to the DRC report (report_drc) for more information.
80*	vivadotclZ4-199
M

Starting %s Task
103*constraints2
Routing2default:defaultZ18-103
p
BMultithreading enabled for route_design using a maximum of %s CPUs97*route2

22default:defaultZ35-254
K

Starting %s Task
103*constraints2
Route2default:defaultZ18-103
g

Phase %s%s
101*constraints2
1 2default:default2#
Build RT Design2default:defaultZ18-101
s

Phase %s%s
101*constraints2
1.1 2default:default2-
Build Netlist & NodeGraph2default:defaultZ18-101
F
:Phase 1.1 Build Netlist & NodeGraph | Checksum: 14ccfe92c
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:21 ; elapsed = 00:00:39 . Memory (MB): peak = 1091.871 ; gain = 141.3552default:default
9
-Phase 1 Build RT Design | Checksum: df60d32b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:21 ; elapsed = 00:00:39 . Memory (MB): peak = 1091.871 ; gain = 141.3552default:default
m

Phase %s%s
101*constraints2
2 2default:default2)
Router Initialization2default:defaultZ18-101
f

Phase %s%s
101*constraints2
2.1 2default:default2 
Create Timer2default:defaultZ18-101
8
,Phase 2.1 Create Timer | Checksum: df60d32b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:21 ; elapsed = 00:00:39 . Memory (MB): peak = 1091.871 ; gain = 141.3552default:default
i

Phase %s%s
101*constraints2
2.2 2default:default2#
Restore Routing2default:defaultZ18-101
;
/Phase 2.2 Restore Routing | Checksum: df60d32b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:21 ; elapsed = 00:00:39 . Memory (MB): peak = 1101.086 ; gain = 150.5702default:default
m

Phase %s%s
101*constraints2
2.3 2default:default2'
Special Net Routing2default:defaultZ18-101
@
4Phase 2.3 Special Net Routing | Checksum: 1538a5e1b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:22 ; elapsed = 00:00:39 . Memory (MB): peak = 1115.648 ; gain = 165.1332default:default
q

Phase %s%s
101*constraints2
2.4 2default:default2+
Local Clock Net Routing2default:defaultZ18-101
D
8Phase 2.4 Local Clock Net Routing | Checksum: 1538a5e1b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:22 ; elapsed = 00:00:39 . Memory (MB): peak = 1115.648 ; gain = 165.1332default:default
g

Phase %s%s
101*constraints2
2.5 2default:default2!

Update Timing2default:defaultZ18-101
:
.Phase 2.5 Update Timing | Checksum: 1538a5e1b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:26 ; elapsed = 00:00:42 . Memory (MB): peak = 1115.992 ; gain = 165.4772default:default
~
Estimated Timing Summary %s
57*route2J
6| WNS=8.8    | TNS=0      | WHS=0.007  | THS=0      |
2default:defaultZ35-57
c

Phase %s%s
101*constraints2
2.6 2default:default2
	Budgeting2default:defaultZ18-101
6
*Phase 2.6 Budgeting | Checksum: 1538a5e1b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:27 ; elapsed = 00:00:43 . Memory (MB): peak = 1115.992 ; gain = 165.4772default:default
@
4Phase 2 Router Initialization | Checksum: 1538a5e1b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:27 ; elapsed = 00:00:43 . Memory (MB): peak = 1115.992 ; gain = 165.4772default:default
g

Phase %s%s
101*constraints2
3 2default:default2#
Initial Routing2default:defaultZ18-101
:
.Phase 3 Initial Routing | Checksum: 1204a5102
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:32 ; elapsed = 00:00:45 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
j

Phase %s%s
101*constraints2
4 2default:default2&
Rip-up And Reroute2default:defaultZ18-101
l

Phase %s%s
101*constraints2
4.1 2default:default2&
Global Iteration 02default:defaultZ18-101
k

Phase %s%s
101*constraints2
4.1.1 2default:default2#
Remove Overlaps2default:defaultZ18-101
>
2Phase 4.1.1 Remove Overlaps | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:36 ; elapsed = 00:00:48 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
i

Phase %s%s
101*constraints2
4.1.2 2default:default2!

Update Timing2default:defaultZ18-101
<
0Phase 4.1.2 Update Timing | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:37 ; elapsed = 00:00:48 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
~
Estimated Timing Summary %s
57*route2J
6| WNS=8.31   | TNS=0      | WHS=N/A    | THS=N/A    |
2default:defaultZ35-57
p

Phase %s%s
101*constraints2
4.1.3 2default:default2(
collectNewHoldAndFix2default:defaultZ18-101
C
7Phase 4.1.3 collectNewHoldAndFix | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:37 ; elapsed = 00:00:48 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
?
3Phase 4.1 Global Iteration 0 | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:37 ; elapsed = 00:00:48 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
=
1Phase 4 Rip-up And Reroute | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:37 ; elapsed = 00:00:48 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
e

Phase %s%s
101*constraints2
5 2default:default2!

Delay CleanUp2default:defaultZ18-101
g

Phase %s%s
101*constraints2
5.1 2default:default2!

Update Timing2default:defaultZ18-101
:
.Phase 5.1 Update Timing | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:37 ; elapsed = 00:00:49 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
~
Estimated Timing Summary %s
57*route2J
6| WNS=8.4    | TNS=0      | WHS=N/A    | THS=N/A    |
2default:defaultZ35-57
8
,Phase 5 Delay CleanUp | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:37 ; elapsed = 00:00:49 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
e

Phase %s%s
101*constraints2
6 2default:default2!

Post Hold Fix2default:defaultZ18-101
l

Phase %s%s
101*constraints2
6.1 2default:default2&
Full Hold Analysis2default:defaultZ18-101
i

Phase %s%s
101*constraints2
6.1.1 2default:default2!

Update Timing2default:defaultZ18-101
<
0Phase 6.1.1 Update Timing | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:38 ; elapsed = 00:00:49 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
~
Estimated Timing Summary %s
57*route2J
6| WNS=8.4    | TNS=0      | WHS=0.442  | THS=0      |
2default:defaultZ35-57
?
3Phase 6.1 Full Hold Analysis | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:38 ; elapsed = 00:00:49 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
8
,Phase 6 Post Hold Fix | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:38 ; elapsed = 00:00:49 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
m

Phase %s%s
101*constraints2
7 2default:default2)
Verifying routed nets2default:defaultZ18-101
@
4Phase 7 Verifying routed nets | Checksum: 106e4180b
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:38 ; elapsed = 00:00:49 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
i

Phase %s%s
101*constraints2
8 2default:default2%
Depositing Routes2default:defaultZ18-101
;
/Phase 8 Depositing Routes | Checksum: 9fa0ecc3
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:39 ; elapsed = 00:00:50 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
j

Phase %s%s
101*constraints2
9 2default:default2&
Post Router Timing2default:defaultZ18-101
�

Post Routing Timing Summary %s
20*route2J
6| WNS=8.429  | TNS=0.000  | WHS=0.460  | THS=0.000  |
2default:defaultZ35-20
=
'The design met the timing requirement.
61*routeZ35-61
<
0Phase 9 Post Router Timing | Checksum: 9fa0ecc3
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:01:46 ; elapsed = 00:00:55 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
4
Router Completed Successfully
16*routeZ35-16
3
'Ending Route Task | Checksum: 9fa0ecc3
*common
ˆ


%s
*constraints2q
]Time (s): cpu = 00:00:00 ; elapsed = 00:00:55 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
ˆ


%s
*constraints2q
]Time (s): cpu = 00:00:00 ; elapsed = 00:00:55 . Memory (MB): peak = 1145.844 ; gain = 195.3282default:default
Q
Releasing license: %s
83*common2"
Implementation2default:defaultZ17-83
½

G%s Infos, %s Warnings, %s Critical Warnings and %s Errors encountered.
28*	vivadotcl2
472default:default2

02default:default2

02default:default2

02default:defaultZ4-41
U
%s completed successfully
29*	vivadotcl2 
route_design2default:defaultZ4-42
ý

I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s
268*common2"
route_design: 2default:default2
00:01:492default:default2
00:00:582default:default2
1145.8442default:default2
204.9922default:defaultZ17-268
G
Running DRC with %s threads
24*drc2

22default:defaultZ23-27
ã
#The results of DRC are in file %s.
168*coretcl2¢
„
C:/Users/karshi01/Desktop/Workshop/SoC Workshop Material/Solutions/P8-BRAM/FPGA/Nexys4/Nexys4.runs/impl_1/AHBLITE_SYS_drc_routed.rpt
„
C:/Users/karshi01/Desktop/Workshop/SoC Workshop Material/Solutions/P8-BRAM/FPGA/Nexys4/Nexys4.runs/impl_1/AHBLITE_SYS_drc_routed.rpt2default:default8
Z2-168
B
,Running Vector-less Activity Propagation...
51*powerZ33-51
G
3
Finished Running Vector-less Activity Propagation

1*powerZ33-1
û

I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s
268*common2"
report_power: 2default:default2
00:00:292default:default2
00:00:222default:default2
1145.8442default:default2
0.0002default:defaultZ17-268
€

UpdateTimingParams:%s.
91*timing2P
< Speed grade: -1, Delay Type: min_max, Constraints type: SDC2default:defaultZ38-91
s
CMultithreading enabled for timing update using a maximum of %s CPUs155*timing2

22default:defaultZ38-191
4
Writing XDEF routing.
211*designutilsZ20-211
A
#Writing XDEF routing logical nets.
209*designutilsZ20-209
A
#Writing XDEF routing special nets.
210*designutilsZ20-210
‚
I%sTime (s): cpu = %s ; elapsed = %s . Memory (MB): peak = %s ; gain = %s
268*common2)
Write XDEF Complete: 2default:default2
00:00:012default:default2
00:00:012default:default2
1145.8442default:default2
0.0002default:defaultZ17-268


End Record